VIA Technologies is scheduled to launch its new processor core, dubbed Isaiah, in the first quarter of 2008, with the new architecture entering EVT engineering validation test stage in the fourth quarter of 2007, according to Digitimes.
“The Isaiah core engineering codename CN will replace VIAs Esther processor architecture, which was introduced in 2004,” Digitimes said.
Isaiah features a 64-bit architecture and will be manufactured on a 65nm process, as compared to 90nm for Esther. Other features include a V4 Bus speed of 1333MHz, up from 800MHz previously, and support for ECC error checking and correction memory and virtualization technology. The L2 Cache will also increase to 1MB from 128KB previously.
